1. Field of the Invention
The present invention relates to a method of estimating symbol synchronization for an Offset Quadrature Phase Shift Keying (OQPSK) demodulator applicable to a Zigbee receiver. More particularly, the invention relates to a method of recovering symbol synchronization of an OQPSK demodulator in which a reference correlation value is reset using a correlation value of a reception signal when detecting symbol synchronization in the OQPSK demodulator, preventing errors in detecting symbol synchronization due to noise, thereby increasing the accuracy in symbol synchronization.
2. Description of the Related Art
Recently, “ubiquitous” meaning a communication environment in which one can connect to a network at any time any place has been suggested. Thus, there have been active researches under way on small-scale wireless communication systems, for example, Wireless Local Area Networks (WLANs), Wireless Personal Area Networks (WPANs), sensor networks and Radio Frequency Identification (RFID) rather than large-scale wireless communication network systems such as cellular networks.
Of these wireless communication systems, the WPAN and/or the sensor network in particular require ultra-small size, low power consumption and low cost in addition to effective communication performance. Thus, it is difficult to apply high-capacity, high-cost equipment and components used in the existing cellular communication systems or WLAN systems to the wireless communication systems such as the WPAN. Conversely, in case of adopting low-cost components to reduce the cost, there may be large phase or frequency offsets occurring in the receiver, thus requiring a solution therefor.
Therefore, there should be researched and developed a demodulator which performs well without needing expensive equipments or products in a communication system environment. In particular, a receiver for receiving OQPSK symbol packets needs to execute symbol synchronization more accurately.
FIG. 1 is a block diagram illustrating a conventional OQPSK demodulator.
The conventional OQPSK demodulator shown in FIG. 1 includes an A/D converter (ADC) 10, a multiple differentiator 20, a symbol synchronization estimator 30, a frequency offset estimator 40 and a correlator 50. The ADC 10 converts an Intermediate Frequency (IF) signal of a receiver into a digital signal Ir and Qr, and the multiple differentiator 20 differentiates the digital signal Ir and Qr from the ADC 10 to minimize the influence of noise in producing a correlation value. The symbol synchronization estimator 30 executes self-correlation for the differentiated signal IrD and QrD from the multiple differentiator 20 to estimate symbol synchronization. The frequency offset estimator 40 estimates frequency offset for the differentiated signal IrD and QrD from the multiple differentiator 20 using a symbol synchronization signal Ts of the symbol synchronization estimator 30. The correlator 50 detects a symbol based on the correlation value of the differentiated signal IrD and QrD from the multiple differentiator 20, in synchronization with the symbol synchronization signal Ts and the frequency offset signal Fo.
The correlator 50 includes a multiplier 51, a maximum value detector 52 and a symbol detector 53. The multiplier 51 operates in synchronization with the symbol synchronization signal Ts and the frequency offset signal Fo, and correlates the differentiated signal IrD and QrD from the multiple differentiator 20 with a reference signal of each of PN sequences to output correlation values for chip signals. The maximum value detector 52 adds up the individual correlation values of the chip signals for each PN sequence, and finds the greatest correlation value out of the added correlation values. The symbol detector 53 detects a symbol that corresponds to the greatest correlation value detected by the maximum correlation value detector 52.
Here, a time point of the symbol synchronization needs to be accurately estimated by the symbol synchronization estimator 30 in order to allow more accurate symbol detection by the correlator 50. The symbol synchronization estimator 30 will be explained hereunder with reference to FIG. 2.
FIG. 2 is a block diagram of a conventional symbol synchronization estimator.
The conventional symbol synchronization estimator 30 shown in FIG. 2 includes a self-correlator 31, a buffer 32 and a symbol synchronization estimation part 33. The self-correlator 31 acquires correlation values of the differentiated signals IrD and QrD and corresponding reference signals IsD and QsD from the multiple differentiator, and adds up the correlation values for each symbol unit to obtain self-correlation values (SCVs). The buffer 32 stores the SCVs from the self-correlator 31, and stores added correlation values (ACVs) acquired using the SCVs. The symbol synchronization estimation part 33 adds the SCVs in the same positions of the preset number of symbols, out of the SCVs of the buffer 32, to acquire the ACVs, and detects a time point when an ACV is greater than a preset reference correlation value to determine the time point of symbol synchronization. Then the symbol synchronization estimation part 33 outputs the symbol synchronization signal Ts at the time point of the synchronization.
The self-correlator 31 includes a first multiplier 31A, a second multiplier 31B, an adder 31C and an integrator 31D. The first multiplier 31A acquires a correlation value between the I signal IrD of the differentiated signal from the multiple differentiator 20 and the corresponding reference signal IsD. The second multiplier 31B acquires a correlation value between the Q signal QrD of the differentiated signal from the multiple differentiator 20 and the corresponding reference signal QsD. The adder 31C adds the correlation value for the I signal from the first multiplier 31A and the correlation value for the Q signal from the second multiplier 31B. The integrator 31D integrates the added I and Q correlation value from the adder 31C for each symbol period 32Tc to acquire the SCV which is a correlation value for each symbol.
Here, 1Tc corresponds to a period of one chip, and 32Tc corresponds to a period for one symbol having 32 chips.
The process of symbol synchronization estimation executed at the symbol synchronization estimation part 33 will be explained hereunder with reference to FIG. 3.
FIG. 3 is a flow chart showing the process of conventional symbol synchronization estimation.
As shown in FIG. 3, examining the conventional symbol synchronization estimation process, the ACVs are acquired based on the SCVs from the self-correlator 31 in a step S31, the ACV and a preset RCV are compared in the next step S32. In the next step S33, if the ACV is smaller than the RCV, the step of acquiring the ACV is repeated, and if the ACV is greater than the RCV, the symbol synchronization signal Ts is outputted.
However, in such a conventional process of symbol synchronization estimation, since a fixed reference correlation value is used, the correlation value of the signal may be greater than the fixed reference correlation value due to noise. This disadvantageously results in errors in symbol synchronization estimation.